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Posts Tagged ‘delta-sigma’

Today, my paper on Tunable Mismatch Shaping for Quadrature Bandpass Delta-Sigma Data Converters was published in the Journal of Signal Processing Systems, Volume 65, Number 2, pp 199-210, November 2011.

From the abstract:

This paper presents an architecture for quadrature bandpass mismatch shaping that allows the center frequency of the mismatch suppression band to be tunable over the entire Nyquist range. The approach is based on the previously reported complex-valued tree-based mismatch shaper, and extends this to allow tunable operation. The proposed design has been implemented using VHDL and synthesized to logic gates. The hardware complexity and mismatch shaping performance of the proposed architecture are compared to that of a reference architecture, which uses separate tunable mismatch shapers for each complex component path. Simulation results show consistent mismatch shaping performance across the entire tuning range.

A pre-publication version of the paper can be downloaded here (pdf).

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Today, I was pleased to learn that my paper was selected for inclusion in a special issue of the Journal of Signal Processing Systems on the “Top Picks from the SiPS 2010”. The issue assembles extended versions of the top 7-10 selected papers from the 2010 IEEE Workshop on Signal Processing Systems (SiPS), which took place last year in October, 2010.

Co-authored with my doctoral adviser, Prof. Earl E. Swartzlander, Jr., the paper is titled Tunable Mismatch Shaping for Quadrature Bandpass Delta-Sigma Data Converters and presents a technique that allows the center frequency of the mismatch noise shaping transfer function through a quadrature bandpass delta-sigma DAC to be adjustable over the entire Nyquist range.

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The final doctoral defense for my PhD has been scheduled for 1 PM on April 20, 2011, taking place in ACE 2.404B on-campus at the University of Texas. My dissertation is titled Tunable Mismatch Shaping for Bandpass Delta-Sigma Data Converters.

From the abstract:

Oversampled digital-to-analog converters typically employ an array of unit elements to drive out the analog signal. Manufacturing defects can create errors due to mismatch between the unit elements, leading to a sharp reduction in the effective dynamic range through the converter. Mismatch noise shaping is an established technique for alleviating these effects, but usually anchors the signal band to a fixed frequency location. In order to extend these advantages to tunable applications, this work explores a series of techniques that allow the suppression band of the mismatch noise shaping function to have an adjustable center frequency. The proposed techniques are implemented in hardware and evaluated according to mismatch shaping performance, latency and hardware complexity.

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Today, I presented a guest lecture to a class of graduate students at the University of Texas at Austin. The topic was Parallel Sorting Networks, and covered material from the seminal Introduction to Algorithms, by Cormen Leiserson and Rivest.

The problem statement: How can a random selection of N numbers be sorted in sub-linear time? Sorting is indeed a well-known problem, and there exist numerous algorithms and implementations in serially-computed software instructions. However, a sorting network is a comparison network in which multiple comparisons can be performed in parallel. The aim of the lecture was to provide a methodical construction of parallel sorting networks in hardware.

There are few assumptions on the input to such a network, consisting of N arbitrarily-ordered numbers which can be compared to one another. The expected output is a list of N numbers in a positionally-sorted order, where the sorting direction can be set to either ascending or descending order. N is assumed to be a power-of-2, but the techniques can be extended to non-power-of-2.

Besides the functional goal above, there is an efficiency goal to reduce the network complexity, i.e. number of comparisons, whilst maintaining a shallow network depth from input to output. In hardware terms, this translates to maintaining low hardware complexity whilst shortening the latency through the network. Low latency is particularly important for stability when such a system is used within an automatic feedback loop.

Chapter 28 in the aforementioned textbook on Algorithms covers this topic extremely well. The authors present a step-by-step approach to solving this problem and provide some good references. Parallel sorting is an old topic, and has been covered as far back as Donald Knuth‘s Sorting and Searching chapter in Volume 3 of The Art of Computer Programming from 1973, and further. There will likely never be an end to applications for these methods.

I concluded the talk with an application example that is very relevant to my current research. A fast and small parallel sorting network is needed within the vector quantizer of a vector-based mismatch shaper. In this case, the vector quantizer is used within the feedback loop of a Delta-Sigma data converter.

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This week, I presented a paper entitled Tunable Mismatch Shaping for Quadrature Bandpass Delta-Sigma Data Converters at the 2010 IEEE Workshop on Signal Processing Systems. This paper extends mismatch-shaping methods to quadrature data converters, and is co-authored with my doctoral advisor, Prof. Earl E. Swartzlander, Jr. The conference was held at the Cypress hotel in Cupertino, California. The presentation took place on Thursday, October 7, during Lecture Session 3: Application-Specific Signal Processing Architectures.

From the abstract:

Quadrature bandpass delta-sigma data converters are widely used in low-IF receiver applications where high linearity is required over a narrow bandwidth. A quadrature delta-sigma modulator with multibit quantization requires a digital-to-analog converter (DAC) for each of the in-phase (I) and quadrature (Q) paths. Device mismatch errors in the DAC can seriously degrade overall converter performance by adding I/Q path-mismatch and distortion. Mismatch noise shaping is an established technique for overcoming these limitations in a complex DAC, but usually anchors the signal band to a fixed frequency location. In order to apply mismatch shaping to applications that require tunable signal band locations, this paper presents a technique that allows the center frequency of the mismatch noise shaping transfer function through the complex DAC to be adjustable over the entire Nyquist range.

A pre-print version of the paper can be downloaded from here (pdf).

Edit-2011: The paper is now available on IEEExplore.

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Another paper has been accepted for presentation at the 2010 IEEE Workshop on Signal Processing Systems (SiPS), taking place in the San Francisco Bay Area, California, from October 6-8, 2010. Co-authored with my doctoral adviser, Prof. Earl E. Swartzlander, Jr., the paper is titled Tunable Mismatch Shaping for Quadrature Bandpass Delta-Sigma Data Converters.

This paper presents a technique that allows the center frequency of the mismatch noise shaping transfer function through a quadrature (complex-valued) bandpass delta-sigma DAC to be adjustable over the entire Nyquist range.

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Today was spent preparing and presenting my paper (co-authored with my doctoral adviser, Prof. Earl E. Swartzlander, Jr.) entitled A novel technique for Tunable Mismatch Shaping in Oversampled Digital-to-Analog Converters, during a poster session at the 2010 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP). The poster session was titled DISPS-P1: Analog and Digital Signal Processing Systems, and provided an opportunity to spend time with researchers working on many other interesting topics. My poster was positioned right next to Professor Mark Arnold, who was presenting his poster on Implementing LNS using Filtering Units of GPUs, and I was quite fascinated to hear that GPUs were now being leveraged for real-time co-processing applications in order to eke out more processor performance.

Located in the heart of downtown Dallas, the Sheraton hotel is as unexciting a conference hotel as they come, with more than adequate facilities for big gatherings, but little else on offer. it didn’t help that the limited selection of restaurants and coffee shops in the vicinity left much to be desired. The conference itself was quite well-attended, and as is to be expected, with a very significant proportion of papers and posters having to do with speech and audio processing. The word of the day was most certainly Compressive Sensing (CS), an area of research pioneered at my alma mater, Rice University, and the talks featuring CS were by far the most heavily-attended.

I enjoyed the experience of presenting my research to others, particularly those whose work was so far removed from mine that I found myself resorting to first principles in order to convey the fundamental ideas. A pre-publication version of the paper can be downloaded here (pdf).

From the abstract:

Over-sampled digital-to-analog converters typically employ a unit-element architecture to drive out the analog signal. Performance can suffer from errors due to mismatch between unit elements, leading to a sharp drop in the achievable signal-to- noise ratio (SNR). Mismatch noise shaping is an established technique for overcoming these limitations, but usually anchors the signal band to a fixed location. In order to extend these advantages to tunable applications, this paper presents a novel technique that allows the mismatch noise shaping transfer function to have an adjustable center frequency.

Edit-2011: The paper is now available on IEEExplore.

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